CareerPlanSign in

SoC Full Chip DV Engineer

Cupertino, United States of America💼 Full-time🗓 2026-04-10 → 2026-09-28

Core

Design Verification Engineer ensuring quality of Apple's premier System-on-Chips (SOCs) or IP subsystems by developing test plans, tests, and coverage strategies.

Role type

Senior IC SoC Design Verification Engineer

Builds

Apple's premier SOCs and IP subsystems

Domain

Semiconductor / Hardware Design

Required skills

Constrained random verification, functional coverage, code coverage, assertion methodology, Verilog/SystemVerilog, digital simulation and debug, computer architecture, digital design fundamentals

Preferred skills

UVM, C/C++, assembly, scripting languages (Perl/Python)

Responsibilities

Review design and architecture specifications, develop test plans and coverage plans, run and triage regressions, track bugs, analyze coverage to achieve top results

Seniority

Mid-Senior, hands-on IC

Sourced via apple · Listed on CareerPlan, which tracks 848,000+ jobs from 20+ sources.