SoC Power Modeling Engineer
Core
Modeling power dissipation, power delivery, and voltage-frequency operating points for AI/ML IPs and various components within Apple SOCs.
Role type
Senior IC SoC Power Modeling Engineer
Builds
State-of-the-art ASICs for Apple products
Domain
Semiconductor / VLSI Design
Deliverable
production ML models
Required skills
SOC power modeling, current demand analysis, DVFM state establishment, EDA tools, scripting, data analysis, VLSI design flow, CMOS technology, thermal control loops, physical design tools
Preferred skills
Low-power digital design, on-die PDN understanding, power gating, package/system power delivery, thermal throttling mechanisms
Responsibilities
Model power dissipation and power delivery for various IPs; Establish voltages for DVFM states of IPs including Neural Engines, CPUs, Graphics, and AI/ML accelerators; Model power dissipation for customer use-cases; Interact with Technology, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points; Correlate models to HW data with power lab and test teams.
