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Package Integration Engineer

San Francisco Bay Area, United States of America💼 Full-time🗓 2026-03-17 → 2026-09-28

Core

Develop custom silicon packaging solutions for modules and systems serving consumer markets.

Role type

Senior IC packaging engineer

Builds

Custom silicon packaging modules and systems

Domain

Semiconductor manufacturing and consumer electronics

Required skills

IC packaging design, supplier management, process qualification, reliability testing, yield analysis, packaging roadmap planning, DOE design, material selection, wafer bumping, flip chip die attach, encapsulation/molding, under-fill, ball attach, package singulation, tape & reel, RDL, BEOL assembly, device physics, component/board level reliability testing

Preferred skills

AutoCAD, APD, multi-physics simulation, wafer back-grind, wafer dicing, multilayer thin die stacking

Technologies

AutoCAD, APD, multi-physics simulation

Responsibilities

Define package characteristics based on performance, cost, and footprint requirements; define package/packaging specifications; work with suppliers on design, materials, equipment, and process flow; perform proof of concept builds, POR establishment, qualification, reliability testing, and yield analysis; coordinate with cross-functional teams to meet development schedules; deliver packaging milestones; define packaging roadmap; manage suppliers' R&D activities.

Seniority

Senior, hands-on IC

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