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Silicon Validation Engineer

San Francisco Bay Area, United States of America💼 Full-time🗓 2025-11-18 → 2026-09-28

Core

Bench-level validation, bring-up, and characterization of DDR memory interfaces within Apple's SoCs.

Role type

Senior IC silicon validation engineer (DDR memory)

Builds

Advanced mobile SoCs with DDR memory interfaces

Domain

Semiconductor / Mobile SoC design

Required skills

DDR memory validation, bench-level electrical testing, signal integrity (SI) measurement, power integrity (PI) measurement, complex silicon debugging, test automation scripting, cross-functional collaboration

Preferred skills

Master's or Ph.D. in Electrical Engineering, Python/Perl/MATLAB scripting, experience with oscilloscopes/logic analyzers/BERTs, SoC architecture knowledge

Technologies

FPGA, JTAG, SPI, Python, Perl, MATLAB, oscilloscopes, logic analyzers, BERTs

Responsibilities

Develop and execute benchtop electrical tests for DDR interfaces; automate test execution and data reporting; debug complex silicon issues and provide design feedback; conduct in-system PI and SI measurements; collaborate with Design, System HW, and Software teams; support ATE and Product Engineering for production ramp-up.

Seniority

Senior, hands-on IC

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