Sr Engineer, ASIC Validation
Core
Own SOC validation across Architecture, Pre-Silicon, Board Design, and Post-Silicon phases for memory and storage solutions.
Role type
Senior ASIC Validation Engineer
Builds
System-on-Chip (SoC) validation and silicon bring-up for memory interfaces
Domain
Semiconductor / Memory and Storage
Required skills
SoC validation, ONFI/LPDDR/PCIE standards, C/FW/AE flow, VCS simulation, silicon bring-up, root-cause analysis, Python/Perl/TCL scripting
Preferred skills
AXI interface knowledge, AI tool proficiency (Claude, CoPilot)
Technologies
VCS, oscilloscopes, logic analyzers, protocol analyzers
Responsibilities
Own SOC validation lifecycle; interact with Architecture/Design/FW teams; develop and review validation plans; perform processor-based SoC verification and emulation; run C-based simulations and debug; support silicon and firmware bring-up; root-cause PHY/controller/firmware/system issues.
Seniority
Senior, hands-on IC