CPU Microarchitect/RTL Engineer - Fetch, Out of Order
Core
Design high-performance, low-power CPU front-end and out-of-order subsystems for Apple Silicon products.
Role type
Senior IC CPU Microarchitect/RTL Engineer
Builds
CPU cores for iPhone, iPad, Watch, Vision Pro, and Mac
Domain
Consumer electronics / CPU microarchitecture
Required skills
Microprocessor architecture design, RTL development (Verilog/VHDL), Timing and power optimization, Logic design principles, Simulation and waveform debugging
Preferred skills
Instruction fetch and decode, Branch prediction, Instruction scheduling, Register renaming, Out-of-order execution, Low power microarchitecture techniques, High-performance CPU trade-offs, C/C++ programming, Perl/Python scripting
Technologies
Verilog, VHDL, Simulators, Waveform debuggers, C, C++, Perl, Python
Responsibilities
Develop micro-architecture specifications from high-level exploration to detailed design, Own RTL development targeting power/performance/area/timing goals, Support verification via test bench development and formal methods, Explore and correlate high-performance strategies, Implement and verify physical design aspects (timing, area, reliability, testability, power)
