Experienced AMS Digital Design Engineer (m/f/d)
Core
RTL Design Engineer developing digital logic functions for high-performance, low-power analog mixed-signal (AMS) PHY designs.
Role type
Senior IC RTL Design Engineer
Builds
High-performance, low-power analog mixed-signal (AMS) PHY designs for Apple products
Domain
Consumer electronics, Analog Mixed Signal (AMS), Digital Logic Design
Required skills
RTL design (Verilog), Digital design flow (simulation, synthesis, timing closure, STA), Hardware/Software partitioning, ASIC test methodology (scan insertion, BIST, test pattern generation), Self-checking test suite development
Preferred skills
Assembly and higher-level code development, Hands-on lab evaluation
Technologies
Verilog, RTL synthesis tools, Static Timing Analysis (STA) tools, DV environments
Responsibilities
Develop detailed specifications for digital functions based on system requirements, Implement functions using Verilog RTL, Partition functions between hardware and firmware, Perform unit-level testing on RTL, Conduct RTL synthesis and equivalence checking, Support design verification teams with test development
Seniority
Senior, hands-on IC
