PMU Design Verification Engineer: Analog & Mixed Signal Engineer
Core
Ensuring high quality silicon for IC chips and IPs by verifying mixed signal IC designs using a combination of analog circuits and RTL in the same simulation.
Role type
Analog & Mixed Signal Verification Engineer
Builds
Production-quality first silicon for state-of-the-art mixed-signal systems
Domain
Semiconductor / Analog & Mixed Signal IC Design
Required skills
Verilog, System-Verilog, Verilog-AMS, test plan development, verification environment creation, simulation execution, failure debugging, coverage analysis, tape-out sign-off
Preferred skills
Analog behavioral modeling, scripting (TCL, Skill, Python, PERL), power management circuitry knowledge, scalable test bench development
Technologies
Verilog, System-Verilog, Verilog-AMS, simulators, waveform viewers, execution automation, coverage collection, gate level simulations
Responsibilities
Develop detailed test and coverage plans based on IC specifications; Complete verification plans from beginning to end including test bench bring-up, regressions, and failure debug; Develop verification methodology suitable for the IP; Develop verification environment including stimuli, checkers, assertions, trackers, and coverage; Sign-off mixed signal designs in preparation for tapeout
