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ASIC Design Verfication Engineer II (Full Time) - United States

3 Locations💼 Full-time💰 $109,900–$109,900🗓 2026-07-09 → 2026-07-31

Core

Design and deliver ground-breaking communications and network processing silicon, contributing to system architecture, high-speed logic design, and verification.

Role type

ASIC Design Verification Engineer

Builds

Communications and network processing silicon chips

Domain

Semiconductor / VLSI / Networking

Deliverable

production ML models | product features | infrastructure

Required skills

Hardware Description Languages (Verilog, VHDL), RTL design and simulation, ASIC/SoC design flow (synthesis, place & route, timing closure), Scripting (Python, Perl, TCL), Digital Signal Processing, Memory and custom library development, Physical design, DFT, Signal integrity, Advanced packaging

Preferred skills

ASIC verification methodologies (UVM, SystemVerilog), Physical design and DFT principles, Linux-based development environments, Adaptability to new technologies

Technologies

Synopsys, Cadence, Mentor Graphics, UVM, SystemVerilog, Python, Perl, TCL

Responsibilities

Collaborate with top industry talent to design and deliver communications and network processing silicon; Contribute to system and processor architecture; Work with latest VLSI techniques and deep submicron technologies; Own projects from concept to in-house physical implementation.

Seniority

Mid-Senior, hands-on IC

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