Senior Design Verification Engineer

Buid, validate and automate emulation models with constant improvement in runtime efficiency. Preferred platforms include Zebu and Palladium. Develop complex verification environments and test suites, including pre-silicon functional verification at the block, chip, and system levels, reference modeling, and post-silicon validation. Collaborate with architects and design engineers to define verification plans, including strategy, test environments, and requirements for IP/Subsystem/SoC-level verification. Create and drive comprehensive test plans and develop tests to ensure full feature coverage. Design and implement technical solutions to address complex design and quality challenges. Develop verification components such as scoreboards, sequences, constrained random tests, assertions, and functional coverage models. Triage and debug failures in testbenches, simulations, and emulation environments. Develop Makefiles and automation scripts to enable scalable and efficient verification flows. Apply Agile methodologies, including participation in code reviews, sprint planning, and continuous integration practices. Collaborate effectively with cross-functional teams across multiple sites and geographies Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. 6+ years of experience in creating emulation and simulation environments, developing tests, and debugging for multiple silicon IP's or systems. 3+ years' industry experience of chip and/or computer architecture. 3+ years industry experience in Verilog, C/C++, and scripting language such as Python, Ruby or Perl CPU or Graphics core verification experience Experience with hardware emulation or FPGAs. In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure. Experience with hardware design for embedded systems. Firmware development, with secure and non-secure boot flow. Design experience or ability to write synthesizable code. Software development experience. Communication skills. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year. Certain roles may be eligible for benefits and other compensation.