Fabric IP Designer
Core
Design advanced memory subsystem components and automation/AI solutions for complex coherent fabrics.
Role type
Senior IC digital design engineer (memory fabrics)
Builds
Memory sub-system components, automation tools, and AI-based efficiency solutions
Domain
Semiconductor / Digital Logic / Computer Architecture
Deliverable
production ML models | product features
Required skills
RTL coding, timing closure, CDC, low power design (UPF), digital logic design, computer architecture, CPU/SoC design principles, protocol bridge design, coherent/non-coherent protocol integration, synthesis and STA tools, scripting (Perl/Tcl/Python), generative AI and agent development
Preferred skills
Experience with specific IPs (PCIe, cache controllers, memory controllers, DDR, security engines), familiarity with AXI/CHI interfaces
Technologies
Verilog, Perl, Tcl, Python, UPF, AXI, CHI
Responsibilities
Develop automation and AI-based solutions to improve organizational efficiency; Own design blocks within complex, coherent fabrics; Collaborate with verification teams to develop test plans; Interface with performance modeling and physical design teams to optimize tradeoffs
Seniority
Senior, hands-on IC
