Principal Memory Controller Architect
Core
Architecting and developing memory controllers, evaluating IP, and optimizing full-stack memory hierarchy for SOC/platform workloads.
Role type
Principal Memory Controller Architect
Builds
Memory controllers and related IP for next-gen memory technologies
Domain
Semiconductor hardware / Memory subsystems
Deliverable
production ML models | product features | infrastructure
Required skills
Memory controller micro-architecture, DDR JEDEC specs, SoC memory hierarchy, emerging memory technologies, performance modeling, vendor IP evaluation
Preferred skills
DDR5/DDR6/LPDDR/HBM/Type 3 CXL knowledge, full-stack optimization
Technologies
DDR5, DDR6, LPDDR, HBM, Type 3 CXL, RDIMM, MRDIMM, LP-MRDIMM
Responsibilities
Review memory technology roadmaps, drive features into production with verification teams, evaluate vendor IP, develop cycle-accurate models, identify full-stack optimization opportunities
Seniority
Principal, hands-on IC with strategic planning
