FPGA Design Engineer
Core
Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs for complex compute, switch, or storage board designs.
Role type
Senior IC FPGA Design Engineer
Builds
Compute, switch, and storage board designs
Domain
Hardware engineering, FPGA/ASIC design, Server infrastructure
Required skills
RTL design (Verilog), Xilinx (AMD) FPGA families (Spartan 6/7, Artix 7), Lattice CPLD, hardware controls, power sequencing, LSI/ASIC device monitoring, simulation, synthesis, timing validation, IP creation for interface controllers, board bring-up and testing, debug of development and field issues, reading complex digital board schematics, use of lab equipment (scopes, analyzers)
Preferred skills
BMC controllers, management interfaces (I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI, PCIe, Ethernet), server grade x86/ARM/GPU processors
Technologies
Xilinx (AMD) FPGA, Lattice CPLD, Verilog, PCIe, Ethernet, I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI
Responsibilities
Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs; Select appropriate parts weighing cost, complexity, longevity, and expandability; Design hardware controls and sequence power, control, and monitoring for LSI and ASIC devices; Perform simulation, design, synthesis, and timing validation in Verilog RTL; Create IP for interface controllers; Conduct design reviews with design and operations teams; Generate programming models and collaborate with firmware engineers on driver development; Work with board engineers for bring-up and testing of printed circuit assemblies; Lead or support debug of development and field issues; Work with HPE partners and vendors to define requirements and support co-development or debug efforts; Work with FPGA vendors to understand roadmaps and new IP developments
Seniority
Senior, hands-on IC
