Photonics Layout Engineer
Core
Creating, optimizing, and validating photonic integrated circuit (PIC) layouts to ensure manufacturability and performance for data center connectivity and communication systems.
Role type
Photonics Layout Engineer (via careerplan.io/jobs/05-00B-7E-C6C-photonics-layout-engineer)
Builds
Silicon photonics PICs for data centers, healthcare, and sensor applications
Domain
Semiconductor manufacturing / Silicon Photonics
Required skills
Cadence Virtuoso, DRC/LVS verification, foundry PDKs, PCell development, SKILL scripting, waveguide routing, layout optimization
Preferred skills
Silicon photonics fabrication process knowledge, mixed photonic-electronic layout integration
Technologies
Cadence Virtuoso, SKILL
Responsibilities
Develop mask layouts for PICs using industry-standard tools; Create and maintain PCells for photonic building blocks; Perform waveguide routing ensuring low-loss optical paths; Verify layouts using DRC and LVS; Collaborate with device designers to translate schematics into manufacturable layouts; Optimize layouts for performance, yield, and compactness; Participate in design automation tool development; Prepare data for tape-out and support mask review; Debug layout issues and propose corrective actions.