FPGA Engineer (eInfochips)
Core
FPGA and RTL design engineer focusing on high-speed interfaces (PCIe, AXI) and front-end verification using EDA tools.
Role type
Senior IC FPGA Engineer
Builds
FPGA designs and RTL implementations for semiconductor clients
Domain
Semiconductor / Hardware Design
Required skills
Verilog, SystemVerilog, PCIe protocol design, AXI/APB interfaces, Python/Tcl/Perl scripting, EDA tools (VCS, SpyGlass, Questa CDC, Fusion Compiler, Design Compiler, Genus), UPF low-power methodology, clock-domain crossing, static timing analysis, RTL design, digital design concepts (via careerplan.io/jobs/g33b37bb-fpga-engineer-einfochips-at-arrow-electronics-inc)
Preferred skills
AMBA AXI buses, ARM/C-based processors, ARM Fabric IPs, IP-XACT
Technologies
ARM Cloud FPGA Fabric Support PCIe Perl Python SystemVerilog Verilog Hardware HTTP
Responsibilities
Perform FPGA and RTL-related design activities, support front-end verification and analysis, contribute to high-speed interface and protocol work, use scripting for automation, communicate progress to customers
Seniority
Senior, hands-on IC
