SoC设计工程师（J78465）
Core
Design and develop AI chip SoC architecture, including IP selection, integration, RTL development, clock/reset/PAD/OTP/low power design, and full-flow verification up to tape out.
Role type
Senior IC SoC Design Engineer (AI Chip)
Builds
AI SoC chips
Domain
Semiconductor / AI Hardware
Deliverable
production ML models
Required skills
Digital ASIC logic design/synthesis/timing analysis, IP integration, SoC architecture, AXI/APB bus protocols, DDR/PCIe/UCIe/SerDes protocols, RTL development, clock/reset/PAD/OTP/low power design, tape out experience
Preferred skills
12nm/7nm or smaller process tape-out experience, backend implementation (SI/PI), packaging, board-level system design
Technologies
12nm, 7nm, AXI, APB, DDR, PCIe, UCIe, SerDes
Responsibilities
Participate in AI chip SoC architecture design and R&D; Select IPs and perform SoC integration and RTL development; Design clock/reset/PAD/OTP/low power circuits; Perform IP integration verification and manage tape-out processes
Seniority
Senior, hands-on IC
