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Sr. Application Engineer - Tessent Design for Test (DFT)

San Diego, CA, United States💼 Full-time💰 $146,700–$293,400🗓 2026-06-04 → 2026-07-22

Core

Lead technical engagements for sales campaigns, driving product adoption into customer projects by creating methodologies, flows, and debugging new implementations.

Role type

Senior IC application engineer (DFT)

Builds

Customer project integrations, pilot projects, and technical sales plans

Domain

Electronic Design Automation (EDA) / Semiconductor Design for Test

Deliverable

production ML models | product features | dashboards & analysis | client delivery | infrastructure

Required skills

Digital design (RTL Verilog/VHDL), Design for Test (DFT) methodology, TCL programming, simulation and verification, project management, diagnosis-driven yield analysis

Preferred skills

Siemens Tessent DFT products expertise, ASIC design experience, marketing knowledge, basic sales tactics

Technologies

Verilog, VHDL, TCL, Microsoft Office, Siemens Tessent DFT

Responsibilities

Drive products into customer projects through adoption by creating methodology and flows; Develop close relationships with customers to assess technical and business requirements; Uncover or qualify new opportunities and strategize with the sales team; Provide technical leadership for assigned accounts

Seniority

Senior, hands-on IC

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