FPGA Engineer
Core
Develop RTL designs, verification environments, and hardware lifecycle management for FPGA/ASIC products.
Role type
Senior IC FPGA/ASIC verification and design engineer
Builds
Production FPGA/ASIC hardware
Domain
Semiconductor hardware design
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, VHDL, Verilog, static timing analysis, linting, clock-domain-crossing (CDC) analysis, synthesis, placement & routing, requirements capture, architecture development, DO-254 compliance
Preferred skills
Xilinx product experience
Technologies
SystemVerilog, UVM, VHDL, Verilog, Xilinx
Responsibilities
Develop RTL code and testbenches; Create UVM constrained random environments; Conduct static timing, linting, and CDC analyses; Manage hardware lifecycle from requirements to placement & routing; Provide technical and process guidance to verification teams
Seniority
Senior, hands-on IC
