Senior IC Package Design Engineer - TeraWave
Core
Own signal and power integrity for RF/Mixed-Signal and mmWave integrated circuit packaging designs, performing analysis and simulation for high-speed signals across package interfaces.
Role type
Senior IC Packaging: Signal and Power Integrity Engineer
Builds
Custom silicon solutions for a multi-orbit satellite communications constellation (TeraWave) serving data center, enterprise, and government customers.
Domain
Aerospace / Satellite Communications / RFIC / mmWave / IC Packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Signal integrity analysis, HFSS simulation, Power delivery network design, RF modeling, High-speed routing, 2.5D/3D electromagnetic simulation, IC packaging delivery
Preferred skills
mmWave expertise, SERDES experience, OSAT coordination, Cadence Allegro, Thermal simulation, System-level simulation, Mentoring
Technologies
HFSS, EMX, Momentum, Cadence Allegro
Responsibilities
Own signal and power integrity for RF/Mixed-Signal and mmWave integrated circuit packaging designs; Perform signal integrity analysis and HFSS simulation for high-speed signals; Design and analyze power delivery networks; Model and characterize RF and mmWave packaging; Collaborate with RFIC, mmWave, ASIC, Package Layout, and SoC architecture teams; Lead the signal and power integrity portion of package delivery; Create documentation and specifications.
Seniority
Senior, hands-on IC
