Sr. Signal and Power Integrity Engineer - SI/PI, Satellites (Starlink)
Core
Define, simulate, verify, and troubleshoot signal and power integrity for high-speed satellite hardware and communication systems.
Role type
Senior IC Signal and Power Integrity Engineer
Builds
Advanced satellite payloads, wireline/optical communication systems, and high-bandwidth memory interfaces for the Starlink constellation.
Domain
Aerospace / High-speed digital electronics / RF / Power delivery networks
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
3D EM simulation (CST, HFSS, ADS), high-speed digital channel simulation, PDN architecture, PCB layout, SERDES debugging, memory interface design, low-loss laminate selection, EMI/EMC debugging
Preferred skills
Electromagnetic theory, transmission line theory, wireline transceiver architecture, Python/C++ programming, full life-cycle hardware development, high-volume PCB manufacturing
Technologies
CST, HFSS, ADS, DDR4, LPDDR5, GPDDR6, QSPI NOR, eMMC, SERDES, DSPs, retimers, optoelectronics
Responsibilities
Specify, design, simulate, verify, and qualify SI/PI aspects of satellite hardware; derive top-level specifications for PCB materials and channel subcomponents; design and optimize transition structures from die bump to die bump; drive detailed component selection for PDN designs; root cause and fix issues in PCB manufacturing, PCBA test, or satellite integration; define best practices, simulation workflows, test methodologies, and signoff criteria.
Seniority
Senior, hands-on IC
