Sr. SI/PI Engineer - Serdes, Satellites (Starlink)
Core
Signal and Power Integrity Engineer responsible for the full lifecycle of high-speed satellite hardware enabling global broadband connectivity.
Role type
Senior IC Signal and Power Integrity Engineer
Builds
Starlink satellite payloads and associated high-speed communication systems
Domain
Aerospace / High-speed digital electronics / Satellite communications
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
High-speed digital design, Power delivery network (PDN) architecture, 3D EM simulation, PCB layout, SERDES debugging, Memory interface design, Thermal analysis, Cross-functional collaboration
Preferred skills
Electromagnetic theory, Transmission line theory, Wireline transceivers, Python/C++ programming, Low loss laminate selection, EMI/EMC debugging, Full lifecycle hardware development
Technologies
CST, HFSS, ADS, DDR4, LPDDR5, GPDDR6, QSPI NOR, eMMC, 10-112+ Gbps SERDES, DSPs, retimers, optoelectronics
Responsibilities
Specify, design, simulate, verify, and qualify SI/PI aspects of advanced satellite hardware; Derive top-level specifications for PCB materials and channel subcomponents; Design and optimize transition structures from die bump to die bump; Drive detailed component selection for PDN designs; Root cause and fix issues in PCB manufacturing and satellite integration; Define best practices, simulation workflows, and test methodologies for SI/PI needs.
Seniority
Senior, hands-on IC
