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Lead Software Engineer

SAN JOSE💼 Full-time💰 $114,800–$114,800🗓 2026-08-21 → 2026-09-26

Core

R&D engineer optimizing timing and power for chip manufacturing using the Innovus Place & Route product.

Role type

Senior IC software engineer (electronic design automation)

Builds

High-performance timing and power optimization algorithms for IC physical design tools

Domain

Semiconductor / Electronic Design Automation (EDA)

Deliverable

production ML models | product features

Required skills

C/C++ development, Linux environment, data structures, algorithms, multithreaded optimization, distributed optimization

Preferred skills

physical synthesis algorithms, timing analysis, Tcl scripting, physical design flows, prior R&D experience in IC tools

Technologies

C/C++, Linux, Tcl

Responsibilities

Develop and optimize timing and power analysis algorithms, implement multithreaded and distributed optimization solutions, contribute to the timing closure flow for chip manufacturing tools

Seniority

Senior, hands-on IC

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