Principal Design Engineer
Core
Design, implement, and integrate high-quality synthesizable RTL for complex, high-performance semiconductor designs and advanced SoCs.
Role type
Principal Digital Implementation Engineer (Senior IC)
Builds
High-performance silicon platforms, SoCs, and subsystems for consumer, hyperscale, automotive, and aerospace applications.
Domain
Semiconductor / Electronic Design Automation (EDA) / Digital Logic
Deliverable
production ML models | product features
Required skills
SystemVerilog, RTL design, microarchitecture development, SoC design, digital logic principles, ASIC/FPGA implementation, simulation and debugging, AMBA protocols, timing analysis, low-power design, IP integration
Preferred skills
CPU/GPU/AI/ML architecture experience, formal verification, RTL synthesis optimization, CDC analysis
Technologies
SystemVerilog, Verilog, AXI, AHB, APB, Cadence tools
Responsibilities
Translate architectural specs into robust microarchitectures and RTL; develop unit-level and block-level test environments; debug functional issues using simulation and waveform analysis; collaborate with physical design teams on timing, area, and power constraints; contribute to integration of internal and third-party IP; document design decisions and methodologies.
Seniority
Principal, hands-on IC with technical leadership potential
