Lead IC Package Design Engineer
Core
Lead IC Package Design Engineer focusing on flip-chip package design, IC-Package-PCB co-design, signal integrity, power integrity, and thermal optimization.
Role type
Senior IC Package Design Engineer
Builds
High-performance, cost-effective IC package solutions for consumer, hyperscale computing, 5G, automotive, aerospace, and health applications.
Domain
Semiconductor packaging and electronic design automation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
flip-chip package design, IC-Package-PCB co-design, signal integrity analysis, power integrity analysis, thermal optimization, die floorplanning, IO placement, bump definition, routing feasibility analysis, package stack-up optimization, BGA ball map design, PCB design interface definition, 2D/3D electromagnetic simulation, transmission line theory, S-parameter extraction, RLGC model analysis, lab validation, DRAM protocol knowledge (DDR4/5, GDDR6/7, HBM3/4, LPDDR5/6), Cadence Allegro tools (APD/SIP, PCB Editor), Cadence Sigrity tools (PowerSI, ExtractIM, Clarity 3D)
Preferred skills
process improvement, methodology development, innovation, efficiency gains in design flows, mentoring
Technologies
Cadence Allegro, Cadence Sigrity PowerSI, Cadence ExtractIM, Cadence Clarity 3D
Responsibilities
Lead flip-chip package design with focus on SI/PI and thermal constraints; Drive IC–Package–PCB co-design balancing performance, power, cost, and thermal trade-offs; Collaborate with cross-functional teams and customers to define optimal end-to-end solutions; Support die floorplanning, IO placement, bump definition, routing feasibility analysis, and optimization of Package stack-up, BGA ball map and PCB design interfaces; Execute 2D/3D EM simulations and apply electromagnetic and transmission line theory to package design challenges; Extract and analyze S-parameters and RLGC models to ensure package compliance with SI/PI requirements; Validate package and PCB designs in the lab, correlating measurements with simulation results; Drive process improvements, methodology development, innovation, and efficiency gains in package design flows; Mentor and support team members while contributing as an individual technical expert.
Seniority
Senior, hands-on IC
