Lead Software Engineer ( Verification )
Core
Developing Cadence software-driven verification solutions for electronic design architectures and IPs.
Role type
Lead Software Engineer (Verification)
Builds
Verification libraries and products for system architectures and IPs
Domain
Electronic design automation (EDA), hardware verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
OOP programming, UVM methodology, embedded C, UNIX shell scripting, problem-solving, analytical skills
Preferred skills
System Verilog, Specman e, VHDL, Verilog, AMBA, PCI-E, USB, Ethernet, 10 Gig, NVMe protocols, metric-driven functional verification
Technologies
UVM, System Verilog, Specman e, VHDL, Verilog, embedded C, UNIX
Responsibilities
Develop verification products based on customer requirements, analyze and translate customer needs to product enhancements, provide active support and guidance on customer issues, collaborate with PV and field functions
Seniority
Senior, hands-on IC
