Lead Design Engineer
Core
Lead Analog Design Engineer responsible for designing high-speed Die-to-Die (D2D) and SERDES products on leading-edge technology nodes (e.g., 3nm FinFET CMOS) from concept to verification.
Role type
Senior IC analog/mixed-signal design engineer (high-speed I/O)
Builds
High-speed D2D and SERDES IC circuit blocks and PMA sections
Domain
Semiconductor industry, analog/mixed-signal IC design, high-speed data interfaces
Deliverable
production ML models | product features
Required skills
CMOS design, SERDES circuit design, jitter analysis, signal equalization, circuit simulation, layout design, physical verification, analog aptitude
Preferred skills
>10Gbps design experience, <16nm technology experience, silicon evaluation lab test experience
Technologies
3nm FinFET CMOS, CAD tools for circuit simulation and layout
Responsibilities
Design high-speed D2D and SERDES products at industry standard data rates; develop analog/mixed signal IC circuit blocks from concept to verification; collaborate with layout engineers on circuit blocks and PMA sections; work with technical team leads on circuit design and SERDES architectures; coordinate with global teams across different time zones
Seniority
Senior, hands-on IC