Lead Product Engineer - Design Verification (MM/VIP)
Core
Lead Product Engineer driving adoption of Memory Verification IP (VIP) portfolio for DDR5, GDDR6, and DFI protocols, supporting pre-sales technical activities and translating customer requirements into product specs.
Role type
Senior IC Product Engineer (Memory Verification IP)
Builds
Memory Verification IP models and technical collateral for electronic design automation
Domain
Semiconductor / Electronic Design Automation / Memory Protocols
Deliverable
product features
Required skills
System Verilog, UVM methodology, Memory protocol expertise (DDR5, GDDR6, DFI), complex problem-solving, technical specification translation
Preferred skills
DFI protocol deep knowledge, cross-functional program leadership
Technologies
System Verilog, UVM, DDR5, GDDR6, DFI
Responsibilities
Lead high-complexity cross-functional programs; Develop and lead large verification initiatives; Evaluate technology effectiveness and data interoperability; Manage issue resolution with vendors; Communicate complex ideas to senior levels and persuade adoption of new viewpoints
Seniority
Senior, hands-on IC
