Digital Design (Physical) Engineer
Core
RTL-to-GDSII physical design implementation for digital and mixed-signal IC products.
Role type
Junior Digital Implementation (Physical Design) Engineer
Builds
Production digital and mixed-signal integrated circuits
Domain
Semiconductor / IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Digital logic fundamentals, CMOS basics, Static Timing Analysis (STA), Clock Tree Synthesis (CTS), Routing, DRC/LVS/ERC verification, Tcl/Python/Shell scripting
Preferred skills
Tape-out experience, Power integrity analysis (IR-drop/EM), DFT methodologies, AI tools for flow automation
Technologies
Cadence Genus, Innovus, Tempus
Responsibilities
Floor planning, placement, clock tree synthesis, routing, timing closure, power delivery network support, physical verification, DFT support, silicon bring-up correlation
Seniority
Junior, Graduate level