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Senior Engineer, Digital Design Engineering

US, TX, Dallas, Tollway💼 Full-time💰 $123,600–$123,600🗓 2026-05-28 → 2026-07-30

Core

Design and verify state-of-the-art analog, mixed-signal, power, RF, and digital signal processing integrated circuits for industries including healthcare, communications, aerospace, and defense.

Role type

Senior IC Digital Design Engineer (ASIC/FPGA)

Builds

Mixed-signal ASIC and FPGA designs

Domain

Semiconductor / Analog & Digital Integrated Circuits

Deliverable

production ML models | product features

Required skills

RTL design, Lint, CDC, simulation, synthesis, verification planning, coverage analysis, transaction level modeling, constrained random techniques, assertion-based verification, formal verification, gate-level simulation, debug, test bench development

Preferred skills

None stated

Technologies

Verilog, System Verilog, Cadence, Synopsis

Responsibilities

Develop digital and mixed-signal designs using Verilog RTL and standard cells; run simulations, synthesis, and CDC checks; verify integration and functionality using verification tools; generate verification plans and perform coverage analysis; participate in tapeout activities including architecture, debug, and evaluation; document design work and present results.

Seniority

Senior, hands-on IC

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