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SRAM QA Engineer

SSIR, Goldstone, Bangalore, India💼 Full-time🗓 2026-06-26 → 2026-07-30

Core

Developing and verifying SRAM IP designs for high-performance, power-efficient, and area-optimized semiconductor solutions.

Role type

Senior IC Design Engineer (SRAM)

Builds

SRAM IP blocks, standard cell libraries, and digital circuit designs

Domain

Semiconductor / Memory / System LSI

Deliverable

production ML models | product features | infrastructure

Required skills

QA methodologies for standard cell libraries, test plan development, regression testing, post-layout verification, RC network fundamentals, FINFET fundamentals, CMOS device characteristics, PPA optimization, statistical/variation analysis, failure mechanism analysis (latch-up, electro-migration), GDS and DK delivery

Preferred skills

Custom or Compiler SRAM/ROM development, circuit robustness analysis, layout review, quality assessment of digital circuit designs

Technologies

QA automation tools, GDS, DK

Responsibilities

Develop test plans and execute regression testing for standard cell libraries, design competitive circuits meeting performance/power specs, lead engineering teams to deliver SRAM IP, analyze circuits to identify and resolve robustness gaps, review layouts and robustness reports to optimize PPA, own delivery from specification to GDS and Design Kit

Seniority

Senior, hands-on IC

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