Design Engineer
Core
Design and verify complex digital circuits for FPGA and SoC products from concept to silicon.
Role type
Senior IC design engineer (RTL/FPGA)
Builds
High-performance FPGA and SoC solutions
Domain
Semiconductor / Digital IC Design
Required skills
RTL design, System Verilog, verification, synthesis, static timing analysis (STA), timing closure, protocol specifications (AXI, PCIe, Ethernet), FPGA tools, hardware debugging, root cause analysis, optimization for power/performance/area
Preferred skills
System-level understanding, scripting (Python/Perl), FPGA architecture knowledge, new product release support
Technologies
System Verilog, Verilog, EDA tools, Python, Perl, AXI, PCIe, Ethernet, MACSec
Responsibilities
Perform RTL design, verification, and synthesis; develop test plans and verification environments; collaborate with architecture and validation teams; analyze and debug design issues; optimize designs for performance, power, and area; generate design documentation; provide customer technical support
Seniority
Mid-level, hands-on IC
