FPGA Development Tools Engineer
Core
Develop and maintain High Level Synthesis (HLS) compiler infrastructure to translate high-level C/C++ code into efficient FPGA/ASIC hardware implementations.
Role type
Senior IC compiler engineer (HLS)
Builds
HLS compilers and compiler passes for hardware synthesis
Domain
Semiconductor / Hardware Acceleration / Compiler Technology
Required skills
C/C++ programming, compiler concepts (parsing, code generation, optimization), digital logic design fundamentals, FPGA/ASIC hardware flows, debugging and validation, documentation
Preferred skills
MLIR, LLVM, Clang, HLS tools (Xilinx Vivado HLS, Intel HLS), hardware description languages (Verilog/VHDL), version control systems (Git)
Technologies
C/C++, MLIR, LLVM, Clang, Verilog, VHDL, Git, Xilinx Vivado HLS, Intel HLS
Responsibilities
Assist in development and maintenance of HLS compiler infrastructure, Support implementation of compiler passes and code transformations, Analyze and improve compilation flow from C/C++ to hardware description languages, Research cutting edge compiler technology for AI computation workload, Integrate and test new features in HLS compilers, Participate in debugging and validating compiler outputs, Document work and contribute to internal knowledge bases
Seniority
Mid-Senior, hands-on IC
