SatCom, ISR & Space Payload Architect
Core
Architecting FPGA-based solutions for satellite communications, ISR, and onboard space payload processing.
Role type
Senior IC space payload architect (FPGA/SatCom)
Builds
Next-generation space and defense platforms with FPGA acceleration
Domain
Aerospace & Defense / Satellite Communications / Signal Processing
Deliverable
production ML models | product features | infrastructure
Required skills
FPGA design (VHDL/Verilog/SystemVerilog), digital signal processing (DSP), system-level architecture, communication protocols (DVB-S2/S2X, CCSDS, LDPC), high-speed data interfaces (PCIe, Ethernet, JESD204), radiation-tolerant design
Preferred skills
onboard satellite payload processing, RF systems and link budgets, AI/ML acceleration in ISR, Altera FPGA toolchain, space qualification requirements
Technologies
FPGA, VHDL, Verilog, SystemVerilog, DVB-S2, CCSDS, LDPC, PCIe, Ethernet, JESD204
Responsibilities
Define system architectures for SatCom and ISR applications, design and optimize signal processing pipelines, drive adoption of FPGA-based acceleration for onboard processing, support system integration across RF front-end and digital processing, develop reference architectures and technical collateral
Seniority
Senior, hands-on IC