FPGA Digital Design Engineer
Core
Design and implement FPGA code for real-time on-orbit connectivity, including DSP algorithms for signal modulation/demodulation and embedded systems interfacing with processors.
Role type
Senior IC FPGA Digital Design Engineer
Builds
Kepler satellite digital payloads and communications/network architecture
Domain
Aerospace / Satellite Communications
Required skills
FPGA/RTL design, Verilog/SystemVerilog/VHDL, Xilinx FPGA (Zynq/UltraScale), timing closure, scripting (Python/Tcl), HDL simulation, IP integration
Preferred skills
Coherent digital demodulation (BPSK/QPSK/QAM), memory mapped interfaces (AXI/Wishbone), high-speed transceivers (JESD204B/PCIe), PCB design, RF electronics
Technologies
Vivado, Quartus, ModelSim, Questa Sim, Riviera-Pro, Xilinx Versal, RFSoC
Responsibilities
Develop custom IP for satellite digital payloads, iterate on DSP and interface designs, integrate IP core vendor functionality, collaborate on communications architecture, participate in spacecraft conceptual design studies
Seniority
Senior, hands-on IC
