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System Signal/Power Integrity Engineer

USA-CA San Jose Innovation Drive💼 Full-time🗓 2026-08-17 → 2026-09-26

Core

System-level Signal and Power Integrity design, simulation, and debug for high data rate SerDes applications up to 400G systems.

Role type

Senior IC System Signal/Power Integrity Engineer

Builds

High-speed digital communication systems, package and PCB designs, and optical/electrical engine solutions

Domain

High-speed digital communications, microwave theory, photonics, and electromagnetic field theory

Deliverable

production ML models | product features

Required skills

Signal integrity for high-speed digital applications, Electromagnetic transmission line theory, Microwave theory, Numerical field solver theory, Power integrity, IC package design, Photonics, EM modeling, Circuit simulation, VNA/TDR measurements, Bit-by-bit and Statistical simulators for SerDes links, Phase noise analysis, Jitter sensitivity measurement, PDN impedance analysis

Preferred skills

Matlab, Cadence APD/Allegro, Linux, Keysight AEL, Optical channel impairments analysis

Technologies

Ansys HFSS, Ansys SIWave, Ansys Q3D, Ansys Polar, Keysight ADS, Keysight AEL, Cadence APD, Cadence Allegro

Responsibilities

Support high data rate SerDes applications up to 400G systems, Perform system-level Signal and Power Integrity design trade-offs and debug, Collaborate with package, PCB, and silicon designers on measurement-simulation correlation projects, Develop models with electromagnetic field solvers, Evaluate system, PCB, and package material and connector solutions, Simulate schematic models and environments, Perform and develop VNA/TDR measurement techniques, Capture high fidelity lab measurements, Organize and manage multiple projects, Document and deliver SI models with supporting documentation, Support customer analysis and debug efforts

Seniority

Senior, hands-on IC

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