Senior Signal Integrity Engineer
Core
Develop, validate, and optimize high-speed signaling solutions for blade- and rack-level architectures in advanced compute platforms.
Role type
Senior IC signal integrity engineer
Builds
High-performance compute platforms (blades, racks, backplanes)
Domain
Hardware engineering / High-speed digital systems
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Signal integrity analysis, high-speed I/O interface expertise, hands-on measurement (VNA, TDR, BERT, oscilloscopes), simulation correlation, S-parameter analysis, impedance control, jitter/timing margin analysis, cross-functional collaboration
Preferred skills
Hyperscale/data center experience, blade/backplane/rack interconnect architecture knowledge, thermal/mechanical SI/PI impact understanding, measurement automation, Python/MATLAB scripting
Technologies
Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE, PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI
Responsibilities
Perform time-domain and frequency-domain simulations; support hands-on lab validation; correlate simulation results with measurements; review schematics and layouts; communicate validation reports and technical recommendations
Seniority
Senior, hands-on IC
