Signal Integrity & Power Integrity Engineer
Core
Lead end-to-end signal and power integrity design for high-speed interconnects across silicon, IC packages, and board-level architectures.
Role type
Senior IC signal integrity and power integrity engineer
Builds
High-speed SERDES, die-to-die interconnects, memory interfaces, and FPGA fabric
Domain
Semiconductor hardware design (silicon, package, board)
Deliverable
production ML models | product features | infrastructure
Required skills
High-speed digital interfaces, SI/PI fundamentals, power delivery network behavior, electromagnetics, circuit analysis, signal processing, simulation and modeling, layout and design tools, scripting and automation
Preferred skills
AI-assisted techniques, Python, MATLAB
Technologies
ANSYS HFSS, Synopsys HSPICE, Cadence Sigrity, Keysight ADS, Mentor Graphics, Cadence Allegro
Responsibilities
Lead end-to-end signal and power integrity design for IC packages and validation platforms; Define and deploy best-in-class SI/PI simulation methodologies; Perform detailed simulation and trade-off analysis of package and board designs; Diagnose and resolve complex system-level SI/PI challenges; Collaborate across silicon, package, and board design teams; Drive forward-looking SI/PI technologies including advanced packaging solutions
Seniority
Senior, hands-on IC
