Signal Integrity & Power Integrity Principal Engineer
Core
Lead end-to-end signal and power integrity design, simulation, and optimization for high-speed interconnects across silicon, IC package, and board-level architectures.
Role type
Principal Signal Integrity & Power Integrity Engineer
Builds
High-speed interconnects, validation platforms, and development kit hardware
Domain
Semiconductor hardware design (FPGA, silicon, package, board)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Signal Integrity fundamentals, Power Delivery Network behavior, High-speed digital interfaces, EDA simulation tools, Python/MATLAB scripting, Layout design tools, Trade-off analysis, Multi-domain problem solving
Preferred skills
Master's or PhD in Electrical/Computer Engineering, Electromagnetics expertise, Circuit analysis, Signal processing
Technologies
ANSYS HFSS, Synopsys HSPICE, Cadence Sigrity, Keysight ADS, Mentor Graphics, Cadence Allegro
Responsibilities
Lead SI/PI design for packages and validation platforms, Define and deploy SI/PI simulation methodologies, Perform simulation and trade-off analysis of package/board designs, Diagnose and resolve complex system-level SI/PI challenges, Collaborate across silicon/package/board teams to optimize electrical solutions, Drive forward-looking SI/PI technologies for future product architectures
Seniority
Principal, hands-on IC/package/board architecture
