ASIC Verification Engineer
Core
Verify silicon for high-speed interconnect PHYs enabling AI and data center networks, ensuring first-pass success from concept to production.
Role type
ASIC Verification Engineer
Builds
High-performance, low-power communication ASICs for cloud computing and server virtualization
Domain
Semiconductor / High-Speed Interconnects
Required skills
SystemVerilog, Verilog, VHDL, IEEE Ethernet protocols, logic design, computer architecture, networking protocols
Preferred skills
C/C++, Object-Oriented Programming (OOP), Python, Perl, TCL scripting
Technologies
SystemVerilog UVM
Responsibilities
Design and maintain advanced verification environments and testbench components; Own verification process at block and chip levels; Develop custom scripts and tools to improve verification efficiency; Collaborate with architecture, design, and firmware teams
Seniority
Mid-level (3+ years experience) or New Grad
