Principal Design Verification Engineer – CPU Core LSU
Core
Lead verification strategy and execution for the CPU Core Load-Store Unit (LSU) in a high-performance out-of-order core, focusing on memory ordering, cache coherency, and consistency.
Role type
Principal Design Verification Engineer (CPU Core)
Builds
High-performance CPU cores and memory subsystems for data-intensive applications
Domain
Semiconductor / CPU Design / Computer Architecture
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
CPU microarchitecture expertise, Load-Store Unit (LSU) verification, memory ordering and consistency, cache-coherent systems, verification methodology, debug skills, software development and scripting
Preferred skills
Formal verification of memory-subsystem properties, multicore memory-consistency challenges, litmus-style verification approaches, cross-team collaboration on complex verification efforts
Technologies
Simulation, formal techniques, emulation, object-oriented programming
Responsibilities
Lead verification strategy for CPU Core LSU including block-level and core-level planning; Define strategies for complex LSU behaviors like load/store ordering and hazard handling; Drive verification of cache-facing LSU behavior including snoops and coherency; Own verification of corner cases involving overlapping accesses and speculative execution; Develop high-value checkers, scoreboards, and coverage models; Apply simulation, formal, and emulation methods; Partner with architects to review specifications and improve debugability; Drive root-cause analysis for coherency failures; Mentor engineers and influence verification methodology
Seniority
Principal, technical lead with mentorship