CareerPlan

SoC Verification Senior Lead Engineer

Bangalore, INFull-time2026-10-22 → 2026-11-10

Core

Develop and own SoC-level and IP-level verification suites for complex ARM-based microcontrollers, ensuring low-power design verification and security IP validation.

Role type

Senior IC SoC verification lead

Builds

Production SoCs and IP blocks for embedded microcontroller products

Domain

Semiconductor / Embedded Systems / Low-power design

Required skills

SystemVerilog, UVM, constrained-random verification, Verilog, assertions (SVA), functional coverage, low-power verification (UPF), gate-level simulation, power-aware simulation, ARM-based microcontroller architecture, C-based DV

Preferred skills

Formal verification, multiple interface verification (SPI, I²C, UART, CAN, eSPI), Flash memory verification, security IP verification, Analog IP verification (ADC, DAC, PLLs)

Technologies

Synopsys VCS, Cadence Xcelium, UVM, UPF, RTL, netlist, FPGA, Emulation platform

Responsibilities

Develop and execute verification plans for SoC and IP; create stimulus and assertions; run regression and analyze coverage; drive DV closure; mentor junior engineers; collaborate with design teams for sign-off

Seniority

Senior, hands-on IC