Technical Director - FE
Core
Define U-arch from high-level specs and lead hands-on design, architecture, and integration of System on Chip (SoC) from specification to tapeout.
Role type
Senior SoC Architect / RTL Design Lead
Builds
Production quality microcontrollers, embedded processors, and SoCs for automotive, industrial, IoT, datacenter, robotics, and radar markets.
Domain
Semiconductor design, embedded systems, SoC architecture
Required skills
RTL design flow, SoC architecture, timing analysis, CDC signoff, IP integration, verification, synthesis, DFT, implementation, clocking, power management, debug, interconnect, safety, security, serial interfaces, multimedia, external bus interfaces
Preferred skills
Computer architecture knowledge, microprocessors, bus protocols (AXI/AHB/APB/ATB)
Technologies
Questa, Spyglass, Fusion Compiler, Genus, CLP/VCLP, Debussy
Responsibilities
Define U-arch from high-level specifications, sign off RTL and timing constraints, document SoC design and micro-architecture, address design-related customer queries
Seniority
Senior, hands-on IC
