Director AI/ML Driven ASIC Design and Implementation Automation
Core
Director leading AI/ML driven automation for ASIC design and implementation to improve power, performance, area, and quality for SoC and IP development.
Role type
Director, AI/ML driven ASIC Design and Implementation Automation
Builds
Automated flows and tools for SoC and IP development using state-of-the-art AI/ML CAD techniques
Domain
Semiconductor / VLSI / AI/ML
Deliverable
production ML models
Required skills
AI/ML techniques (LLMs, CNN, RNN, GraphNN), Python, C++, Unix/Linux, Git, data structures, algorithms, optimization problems
Preferred skills
VLSI CAD methodology, HDL (System Verilog, Verilog, VHDL), EDA tools, CI/CD processes (Jenkins, LSF), low-power flows (UPF)
Technologies
Python, C++, Unix/Linux, Git, BitBucket, System Verilog, Verilog, VHDL, Jenkins, LSF, Splunk, Make
Responsibilities
Explore research ideas and solutions for AI/ML in VLSI design; work with academic communities and internal teams to evaluate leading edge SoC technologies; develop prototype solutions to pilot automation for NXP designs; coordinate cross-functional initiatives for digital transformation
Seniority
Director, strategy & mentorship