Sr. Staff Memory Design Engineer
Core
Designing custom high-performance memory circuits (TCAM, SRAM, CPU caches) and advancing DTCO optimization techniques for next-generation ASICs targeting Cloud AI and Data Center applications.
Role type
Sr. Staff Memory Design Engineer (ASIC)
Builds
Custom memory and circuit blocks for Cloud AI and Data Center ASICs
Domain
Semiconductor / ASIC Design / Memory Technology
Deliverable
production ML models | product features | infrastructure
Required skills
Digital circuit design, DTCO optimization, TCAM design, SRAM design, CPU cache design, PPA optimization, dual rail memory design, mentorship
Preferred skills
None stated
Technologies
None explicitly listed (TCAM, SRAM, CPU caches are memory types, not tools)
Responsibilities
Define and design custom memory and circuits for next-gen ASICs, collaborate with product and architecture teams on PPA requirements, advance DTCO optimization techniques, design dual rail custom memories from start to finish, mentor and guide other designers
Seniority
Sr. Staff, hands-on IC with mentorship