5G RF SOC Verification Internship 2027
Core
Design verification intern developing and verifying behavioral models for RF and mixed-signal blocks at chip/SoC level.
Role type
Design Verification Intern (RF/Mixed-Signal)
Builds
RF and mixed-signal IP for chip/SoC
Domain
Semiconductor / RFIC / Mixed-Signal
Required skills
Behavioral modelling, Analogue Integrated Circuits, Digital Integrated Circuits, Debugging, Verification environment development
Preferred skills
Analytical thinking, Autonomous work, Team collaboration, Innovative problem solving
Technologies
RFIC, Mixed-signal, Chip/SoC
Responsibilities
Develop and verify behavioral models for RF and mixed-signal blocks, Functional verification of RF and mixed-signal IP at chip/SoC level, Contribute to design and development of verification environment and flow
Seniority
Intern
