Principal/Sr/Staff BEOL Engineer, DRAM PI
Core
Lead module development for next-generation DRAM technology nodes, defining structural and electrical requirements and integrating modules across the process flow.
Role type
Principal/Senior/Staff Backend-of-Line (BEOL) Process Integration Engineer
Builds
Next-generation DRAM memory and storage solutions
Domain
Semiconductor manufacturing, DRAM process integration
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor device physics, electrical characteristics evaluation, materials science, JMP statistical analysis, Python data engineering, cross-functional collaboration, technical documentation
Preferred skills
5+ years in process integration, 2+ years in DRAM fab or DRAM transfer team, Front End/Middle of Line/Interconnect experience, device physics/electrical engineering background, fluent Japanese
Technologies
JMP, Python
Responsibilities
Define structural and electrical specifications for one or more modules; design, execute, and analyze experiments based on structure-electrical correlations; optimize existing process flows to meet product requirements; extract and analyze inline, defect, parameter, and probe data to improve yield and reliability; collaborate cross-functionally with design, product technology, modeling, and quality teams; maintain communication between R&D and pilot fabs; document R&D activities for manufacturing transfer.
Seniority
Senior, hands-on IC with strategic module ownership