New College Grad - Mixed Signal Design Engineer, HBM
Core
Designing digital micro-architecture and RTL for high-bandwidth memory (HBM) base-die subsystems to ensure robust silicon integration.
Role type
Mixed Signal Design Engineer (HBM)
Builds
HBM base-die subsystems for high-bandwidth memory products
Domain
Semiconductor / Memory Systems
Deliverable
production ML models | product features
Required skills
SystemVerilog RTL, clock and reset architecture, CDC/RDC methodologies, low-power design, design-for-debug, design-for-test
Preferred skills
post-silicon validation, silicon bring-up, MBIST, LBIST, verification planning
Technologies
SystemVerilog, RTL, CDC/RDC
Responsibilities
Define digital micro-architecture for HBM base-die subsystems; Translate system requirements into timing, power, and area considerations; Implement synthesizable RTL including multi-channel logic and DFT interfaces; Collaborate with verification teams on coverage goals and debugging; Support silicon bring-up and post-silicon validation.
Seniority
Entry-level (New College Grad)
