ENGINEER HBM LAYOUT
Core
Design and develop analog, mixed-signal, and custom digital blocks with full chip-level integration support for High Bandwidth Memory (HBM) used in AI and high-performance computing.
Role type
Senior IC Layout Design Engineer (Analog/Mixed-Signal)
Builds
Custom analog and digital blocks for HBM chips
Domain
Semiconductor manufacturing, Memory (HBM), Analog/Mixed-Signal IC design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog/custom layout design in CMOS processes, LVS/DRC/Antenna verification, Cadence VLE/VXL, Mentor Calibre DRC/LVS, block-level layout creation (PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier), knowledge of layout effects (matching, electromigration, latch-up, coupling, crosstalk, IR-drop), speed/capacitance/power/area trade-off analysis
Preferred skills
Tape-out support experience, multi-project layout management, advanced physical verification problem-solving
Technologies
Cadence VLE/VXL, Mentor Calibre
Responsibilities
Design and develop analog, mixed-signal, and custom digital blocks; Perform layout verification (LVS/DRC/Antenna); Lead planning, area/time estimation, and scheduling for multiple projects; Collaborate with global engineering teams
Seniority
Senior, hands-on IC