シニアスタッフアナログエンジニア､レイアウトデザイン
Core
Senior analog layout engineer designing high-performance ICs for data centers and servers, optimizing layout to maximize analog circuit performance.
Role type
Senior IC analog layout engineer
Builds
High-performance analog and mixed-signal ICs (power, interface, precision digital power monitors) for data center and server applications
Domain
Semiconductor design, analog/mixed-signal ICs, data center infrastructure
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog circuit layout design, Floor planning, Parasitic extraction (PEX) and simulation, Matching and noise mitigation techniques, DRC/LVS verification, Cadence Virtuoso, Analog circuit fundamentals (Op-amps, comparators, ADC/DAC, power circuits)
Preferred skills
BCD process layout, Power IC and high-speed interface IC layout, ESD protection layout, Spectre simulation, Linux environment proficiency
Technologies
Cadence Virtuoso, Spectre, Linux
Responsibilities
Perform analog circuit layout design, Create and optimize floor plans, Execute parasitic extraction and simulation verification, Optimize layouts considering matching and noise, Perform DRC/LVS verification and corrections, Collaborate with circuit designers for performance tuning
Seniority
Senior, hands-on IC
