STAFF ENGINEER - HIG HBM PSE
Core
Lead end-to-end validation execution for High Bandwidth Memory (HBM) products, ensuring on-schedule runs, risk-aware re-plans, and efficient material usage while driving silicon debug and continuous improvement.
Role type
Staff Engineer, HBM Validation & Test Platform
Builds
Production HBM memory chips for data centers and AI applications
Domain
Semiconductor manufacturing, Memory (DRAM/HBM/NAND), Validation Engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
HBM validation, MBIST/Native Mode testing, Verilog simulation, C/C++/Python/APG scripting, high-speed I/O characterization, data analytics, root-cause analysis, test program development
Preferred skills
Linux programming, UVM, lab equipment operation (oscilloscopes/logic analyzers), CS/QS shmoo target definition, ML-driven validation workflows
Technologies
SM3/Cobra, Advantest V93K, Verilog, C, C++, Python, APG, Confluence, Jira, Git, Perforce
Responsibilities
Lead end-to-end Validation Run execution; Develop and debug test programs on SM3/Cobra and Advantest V93K; Perform power/thermal characterization and correlate data with performance; Architect and execute Verilog simulations to validate hypotheses; Lead silicon debug across Design, Verification, Quality, and System Engineering; Coach junior engineers on validation best practices
Seniority
Staff, hands-on IC with mentorship
